Jade called this board the "Big-Z". It had on board a socket for a
2704/2708/2716/2532 EPROM which could be addressed on any 1K, 2K, or 4K
boundary. There was power-on jump directly to on-board EPROM with optional
wait states for the on-board EPROM. The on-board EPROM could be used
in shadow mode (access only after power-on or reset) allowing the full 64K
RAM memory to be used. Automatic MEM WRITE generation if front panel was not
used, disabled if front panel was connected. DMA Capability at 2 or 4 MHz
operation. Latched data output bus provided additional data hold time
for reliable operation with all device types. Straight-through address
and data paths provide improved read access times for I/O and memory
devices. There was an on-board USART for synchronous or asynchronous
RS232 operation. The connection was a 16 pin IC socket. There also was
a Baud rate generator on board to provide all standard baud rates. The USART
could I be assigned to any group of four I/O addresses (only two are used).
Finally, reverse channel capability on USART allows use with buffered
peripherals or devices with a "not-ready" indication. Interestingly a
Clock 1 & 2 was generated with a 8224. This was not a an IEEE 696 type
board. There was for example no memory addressing past 64K.
The manual for this board can be obtained
here.
